Electrical
Doulos
Certified VHDL/Verilog Developer
Demonstrates high-level hardware description language proficiency. Essential for ASIC and FPGA roles.
The facts
Exam cost
$300
Difficulty
Hard
Prep time
100 hours
Exam length
3 hours
Passing score
70%
Renewal
Lifetime
Our estimate of the salary effect of holding this credential: +$15,000. This is an editorial estimate, not a measured figure.
Prerequisites
Digital design experience
How people prepare
- Doulos Training Material
- HDL Chip Design
- Asic-World Tutorials
Browse the course catalogue or the tools we review.